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description the A8512 is a multi-output wled/rgb driver for backlighting lcd monitors and televisions. it integrates a boost controller to drive external mosfet, and six internal current- sinks. the boost converter operates in constant frequency (programmable) current mode control. pwm dimming allows led currents to be controlled in 500:1 ratio. the led sink current is set by an external r_iset resistor (see chart below). more than one led sinks can be combined together to achieve even higher current per led string. multiple A8512s can be connected in parallel, with one master controller controlling the boost stage, and up to five slave controllers, which act as led sinks. this allows up to 36 led strings to be powered by just one boost converter. the A8512 operates from a single supply of 8 to24 v. it provides protection against overvoltage, open or shorted led string, and overtemperature. a dual level cycle-by-cycle current limit function provides soft start and protects against overloads. the device is provided in a 24-pin soicw package (lb), with internally fused pins for enhanced thermal dissipation, and a 28-contact 5 mm 5 mm qfn package (et) and a 24-pin tssop package (lp), both with an exposed thermal pad for enhanced thermal dissipation. all packages are lead (pb) free, with 100% matte tin leadframe plating. A8512l-ds, rev. 6 features and benefits ? six integrated high current sinks ? fixed frequency current mode control with integrated gate driver ? 300 khz to 1 mhz adjustable switching frequency ? controlled startup using options of enable, pwm signal, or battery voltage ramp ? parallel operation with one boost controller (master) and up to five slave controllers ? active current sharing between led strings for 0.6% accuracy and matching ? no audible mlcc noise during pwm dimming ? adjustable overvoltage protection (ovp) ? open or shorted led string protection ? overtemperature, cycle-by-cycle current limit, and undervoltage protection ? soic 24-pin package for easy single-side pcb manufacturing, or tssop 24-pin and qfn 28-contact packages with exposed thermal pad for better thermal performance led backlight driver for lcd monitors and televisions packages: typical application circuit not to scale A8512 24-pin soicw with internally fused pins (lb package) 24-pin tssop with exposed thermal pad (lp package) 28-contact qfn with exposed thermal pad (et package) f i g ure 1. t y pical application circuit for sin g le ic operation, and ( in dotted box ) master/slave multiple ic operation . fset driver vbias vreg7v vin pwm en sense1 sense2 led1 led2 led3 led4 led5 led6 v bat A8512 comp iset r ovp2 ovp 18 leds per string to additional slaves control bus r fset r iset rz2 cz2 fault v out p c7 c8 fset driver vbias vreg7v vin pwm en sense1 sense2 led1 led2 led3 led4 led5 led6 v bat 8 to 24 v A8512 master slave a comp iset r sc r ovp1 ovp 18 leds per string r fset r iset rz1 cz1 d1 q1 l1 fault fault enable pwm p agnd agnd lgnd lgnd pgnd p c5 c6 r1 c4 c3 p c2 c1 p agnd agnd lgnd lgnd pgnd p led current versus iset resistor value v ref = 1.24 v, gain = 640 130 120 110 100 90 80 70 60 50 40 30 20 10 6 8 12 14 16 18 20 22 24 26 28 30 i led (ma) r iset (k )
led backlight driver for lcd monitors and televisions A8512 2 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com absolute maximum ratings characteristic symbol notes rating unit vin pin input voltage v in ?0.3 to 34 v led1-led6 pin voltage v ledx ?0.3 to 40 v ovp pin input voltage v ovp ?0.3 to 50 v sense1 and sense2 pin input voltage v senx ?0.3 to 1 v vbias, vreg7v, and driver pins ?0.3 to 10 v remaining pins input voltage ?0.3 to 7 v operating ambient temperature t a range e ?40 to 85 oc maximum junction temperature t j (max) 150 oc storage temperature t stg ?55 to 150 oc selection guide part number packing package A8512elbtr-t 1000 pieces per 13-in. reel 24-pin soicw, with internally fused pins for enhanced thermal dissipation A8512elptr-t 4000 pieces per 13-in. reel 24-pin tssop, with exposed thermal pad for enhanced thermal dissipation A8512eettr-t 1500 pieces per 7-in. reel 28-contact qfn, with exposed thermal pad for enhanced thermal dissipation thermal characteristics may require derating at maximum conditions, see application information characteristic symbol test conditions* value unit package thermal resistance r ja package et, 4-layer pcb, based on jedec standard 32 oc/w package lb, on 2-layer pcb, 1-in. 2 2-oz copper exposed area 51 oc/w package lb, on 4-layer pcb, based on jedec standard 35 oc/w package lp, on 4-layer pcb, based on jedec standard 28 oc/w *additional thermal information available on the allegro website
led backlight driver for lcd monitors and televisions A8512 3 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com led1 osc current mode boost controller en fset pwm vin vbias fault tsd ldo ovp ocp driver sense1 sense2 v in ovp l1 d1 q1 overvoltage protection led2 led3 led4 led5 led6 control and feedback reference current led select logic open/short led detect 6 6 6 comp ref ocp ss iset 50 k 7 v 5 v r sc r fset r iset c comp r ovp 10 k 0.1 f control logic/ uvlo +5 v pgnd dgnd lgnd pad et and lp only lgnd agnd agnd 0.1 f p p p p vreg7v functional block diagram
led backlight driver for lcd monitors and televisions A8512 4 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com package lb package lp package et pin-out diagrams 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 pwm fault led6 led5 led4 lgnd lgnd led3 led2 led1 comp fset en pgnd driver vreg7v vin agnd agnd vbias ovp sense2 sense1 iset pad 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 dgnd pwm fault led6 led5 led4 lgnd led3 led2 led1 comp fset en pgnd driver vreg7v vin vbias nc ovp sense2 sense1 iset agnd pad 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 pgnd nc en dgnd pwm fault led6 sense2 sense1 iset agnd agnd fset comp led5 led4 lgnd lgnd led3 led2 led1 driver vreg7v nc vin nc vbias ovp terminal list table number name function et lb lp 26 1 1 en device enable. apply logic-high signal to enable, low to shut down. 28 2 2 pgnd power ground for external fet gate driver. connect directly to r sc ground and to common star ground. 1 3 3 driver gate driver terminal to drive external mosfet. 2 4 4 vreg7v gate driver supply from internal voltage regulator. bypass with 0.1 to 1 f ceramic capacitor to pgnd. 4 5 5 vin input supply voltage for the ic. 11, 12 6, 7 12 agnd analog (signal) gnd for the ic. connect to common star ground. 6 8 6 vbias bias supply voltage from internal regulator. bypass with 0.1 to 1 f ceramic capacitor to agnd 7 9 8 ovp overvoltage protection terminal. connect this pin to output capacitor through a resistor r ovp to set the ovp threshold. 8 10 9 sense2 connect to ground side of current sense resistor r sc . 9 11 10 sense1 connect to high side of current sense resistor r sc . 10 12 11 iset sets 100% current through led strings; connect r iset from iset to agnd. 13 13 13 fset sets switching frequency; connect r fset from fset to agnd. 14 14 14 comp compensation pin; connect c comp (1 f typical) capacitor to agnd. 15,16,17 15,16,17 15,16,17 led1-3 led current sinks; connect unused ledx pins to ground to disable. 18,19 18,19 18 lgnd led current sink ground; connect to common star ground. 20,21,22 20,21,22 19,20,21 led4-6 led current sinks; connect unused ledx pins to ground to disable. 23 23 22 f a u l t this open-drain output is pulled low when fault condition occurs; connect to external pull-up resistor. 24 24 23 pwm pulse width modulation led-current control; apply logic level pwm for dimming. 25 ? 24 dgnd digital ground for input control signals (en and pwm); connect to common star ground. 3,5,27 ? 7 nc not connected electrically. pad ? pad pad exposed pad. solder to gnd plane for enhanced thermal dissipation.
led backlight driver for lcd monitors and televisions A8512 5 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com electrical characteristics valid at v in = 12 v; t a = 25c, r fset = 52 k , r iset = 12.4 k , except indicates specifications guaranteed over the full operating temperature range with t a = t j , unless otherwise noted characteristics symbol test conditions min. typ. 1 max. unit input voltage range v in 8 ? 24 v internal bias voltage range v bias 4.75 ? 5.5 v internal gate driver voltage v driver v in 10 v 6.5 ? 8 v undervoltage lockout threshold for v in v uvlo v in falling 5.7 6.5 6.8 v undervoltage lockout hysteresis for v in v uvlohys ? 0.55 ? v supply current 2 i vin switching at no load ? 7 ? ma shutdown, en = v il , t a = 25c ? 0.1 1 a standby, en = v ih , pwm = v il , soft start completed ?23ma boost controller switching frequency f sw 0.8 1 1.25 mhz minimum switch off-time t off(min) driver output ? 72 ? ns minimum switch on-time t on(min) driver output ? 72 ? ns logic input levels (en and pwm pins) input voltage level low v il ? ? 0.4 v input voltage level high v ih 1.5 ? ? v input leakage current 2 i in en = pwm = 5 v ? 100 ? a error amplifier comp pin source current i ea(src) v comp = 1.5 v ? 160 ? a comp pin sink current i ea(snk) v comp = 1.5 v ? 20 ? a comp pin pull-down resistance r comppd f a u l t = 0 ? 1000 ? k driver section peak source current 5 i pk(src) measured at v driver = 0 v ? 2 ? a peak sink current 5 i pk(snk) measured at v driver = v reg7v ?2?a high side gate drive on resistance r ds(on)h measured at v driver = v reg7v / 2 ? 4 ? low side gate drive on resistance r ds(on)l measured at v driver = v reg7v / 2 ? 3 ? sense overcurrent threshold voltage v sen v sense1 ? v sense2 80 95 110 mv led current sinks ledx pin regulation voltage v ledx i led = 80 ma ? 1.4 ? v i set to i ledx current gain a iset i set = 100 a ? 640 ? a/a iset pin voltage v iset ? 1.235 ? v i set allowable current range 2 i set 41 ? 190 a continued on the next page?
led backlight driver for lcd monitors and televisions A8512 6 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com electrical characteristics (continued) valid at v in = 12 v; t a = 25c, r fset = 52 k , r iset = 12.4 k , except indicates specifications guaranteed over the full operating temperature range with t a = t j , unless otherwise noted characteristics symbol test conditions min. typ. 1 max. unit ledx accuracy 3 err iledx led1 through led6 = 1.5 v, at 100% current ?3 0.6 3 % ledx matching 4 i ledx led1 through led6 = 1.5 v, i set = 100 a ?3 0.6 3 % ledx switch leakage current 2 i sl v ledx = 12 v, en = 0 ? 48 ? a ledx bleeder resistor to gnd r ledx pwm = low, v ledx = 10 v ? 250 ? k soft start soft start sense threshold voltage v sens sense voltage for boost switch current sensing ? 28.5 ? mv soft start ledx current limit relative to led 100% current i led(ss) current through enabled ledx pins during soft start ?8?% protection features thermal shutdown threshold t tsd t j rising ? 165 ? c short circuit detect voltage v sc measured on any ledx pin ? 25 ? v output overvoltage threshold v ovp r ovp = 0 18.0 19.5 21.0 v ovp pin leakage current 2 i ovplk v ovp = 22 v, en = v il , or pwm=v il ? 0.1 ? a overvoltage protection sense current 2 i ovph 183 200 217 a f a u l t pin output leakage 2 i flt v = 5 v ? ? 1 a f a u l t pin output voltage v ol i = 500 a ? ? 0.4 v 1 typical specifications are at t a = 25oc. 2 for input and output current specifications, negative current is defined as coming out of the node or pin (sourcing), positive current is defined as going into the node or pin (sinking). 3 led accuracy is defined as (i set 640 ? i led (av)) / (i set 640), i led (av) measured as the average of i led1 through i led6 . refer to characterization chart for variation over temperature range. 4 led current matching is defined as (i ledx ? i led (av)) / i led (av), with i led (av) as defined in footnote 3. refer to characterization chart for variation over temperature range. 5 guaranteed by design and characterization. 101.0 100.5 100.0 99.5 99.0 98.5 98.0 -60 -40 -20 20 40 60 80 100 0 normalized total i led(av) (%) temperature, t a (c) variation of total led current versus ambient temperature 100% current = 64 ma per channel at 25c
led backlight driver for lcd monitors and televisions A8512 7 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com characteristic performance 10 11 12 13 14 15 16 17 18 19 20 21 22 23 efficiency (%) 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 efficiency (%) v bat (v) v bat (v) efficiency versus battery voltage for various led configurations fet = irfr120n, v in = 12 v, f sw = 500 khz l = 22 h, load = w92050c leds at 112 ma per string efficiency versus battery voltage for various led configurations fet = fqb17n08l, v in = 12 v, f sw = 500 khz l = 22 h, load = w92050c leds at 112 ma per stri n 10 11 12 13 14 15 16 17 18 19 20 21 2 2 300 400 500 600 700 800 900 1000 1100 50 60 70 80 90 100 110 120 130 140 150 f sw (khz) r fset (k ) switching frequency versus fset resistor value f sw (mhz) = 52 / r fset (k ) 3 strings 18 leds per string v out 60 v, p out 20.2 w 2 strings 18 leds per string v out 60 v, p out 13.4 w 3 strings 14 leds per string v out 47 v, p out 15.8 w 2 strings 14 leds per string v out 47 v, p out 10.5 w 3 strings 18 leds per string v out 60 v, p out 20.2 w 2 strings 18 leds per string v out 60 v, p out 13.4 w 3 strings 14 leds per string v out 47 v, p out 15.8 w 2 strings 14 leds per string v out 47 v, p out 10.5 w efficiency of the boost converter stage is affected by the selection of power mosfet, switching frequency, input/output voltages, and output power. the external mosfet used for the above chart is the irfr120n, which has a relatively high r ds(on) = 0.21 . this causes higher conduction loss, especially at lower input voltage. the power mosfet is replaced with fqb17n08l, which has a lower r ds(on) = 0.115 . this results in less conduction loss at lower input voltage, however, the switching loss becomes more significant at higher input voltage.
led backlight driver for lcd monitors and televisions A8512 8 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com normal startup power sequences v bat = 12 v, load = 6 strings, 16 leds each string, 56 ma per string, output capacitors = 2 2.2 f ceramic the A8512 can startup with any combination of input and power sequences, as shown in waveforms below: symbol parameter units/division c1 v en 10 v c2 v pwm 10 v c3 v out 10 v c4 total i led 100 ma t time 2 ms symbol parameter units/division c1 v en 10 v c2 v pwm 10 v c3 v out 10 v c4 total i led 100 ma t time 2 ms symbol parameter units/division c1 v en 10 v c2 v pwm 10 v c3 v out 10 v c4 total i led 100 ma t time 2 ms symbol parameter units/division c1 v en 10 v c2 v pwm 10 v c3 v out 10 v c4 total i led 100 ma t time 2 ms c3,c4 c1 c1 c1 c1 c2 c2 c2 c2 v pwm t v out i led v en normal startup with en = low-to- high transition (pwm = high) normal startup with pwm = low-to- high transition (en = high) normal startup with pwm signal toggling at 500 hz, 50% duty cycle normal startup with battery voltage ramping up from 2 to 12 v (en= pwm = high) t t t v pwm v out i led v en v pwm v out i led v en v pwm v out i led v en c3,c4 c3,c4 c3,c4
led backlight driver for lcd monitors and televisions A8512 9 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com typical pwm operation waveforms v bat = 12 v, load = 6 strings, 16 leds each string, 56 ma per string, output capacitors = 2 2.2 f ceramic t t v pwm v out v en v pwm v out i led v en c1 c1 c2 c2 c4 symbol parameter units/division c1 v en 10 v c2 v pwm 10 v ?* v out 1 v c4 total i led 100 ma t time 2 ms *offset = 46 v symbol parameter units/division c1 v en 10 v c2 v pwm 10 v ?* v out 1 v c4 i led 100 ma t time 50 s *offset = 46 v pwm dimming at 200 hz 10% duty cycle; output voltage ripple approximately 0.8 v (out of 50 v) pwm dimming at 5 khz 10% duty cycle 1 100 90 80 70 60 50 40 30 20 10 0 10 0.1 ratio of led current (%) 100 10 1 0.1 ratio of led current (%) pwm frequency (khz) pwm duty cycle (%) ratio of led current versus pwm frequency pwm duty cycle = 10% ratio of led current versus pwm duty cycle pwm frequency = 200 hz 0.1 1 10 100 compensated pulse width uncompensated pulse width to improve the accuracy of pwm dimming at very high frequency and/or very low duty cycle, it is necessary to compensate the pwm pulse width, as described in application information section.
led backlight driver for lcd monitors and televisions A8512 10 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com normal operation and fault conditions v bat = 12 v, load = 6 strings, 18 leds each string, 56 ma per string, output capacitors = 2 2.2 f ceramic, rovp = 249 k (ovp at 69 v) t v ledx v out i led v en c1 c2,c3 c4 symbol parameter units/division c1 v en 10 v c2 v ledx 10 v c3 v out 10 v c4 total i led 100 ma t time 2 ms symbol parameter units/division c1 v en 10 v c2 v ledx 10 v c3 v out 10 v c4 total i led 100 ma t time 2 ms symbol parameter units/division c1 v en 10 v c2 v ledx 10 v c3 v out 10 v c4 total i led 100 ma t time 2 ms symbol parameter units/division c1 v fault 10 v c2 v ledx 10 v c3 v out 10 v c4 total i led 100 ma t time 2 ms normal startup with v bat = 12 v, (v out 58 v when cold) startup with one led string open; (ovp tripped at 69 v. open string removed from regulation. remaining strings operate normally.) startup with all led strings connected, then one led string becomes open; (ovp tripped at 69 v. open string removed from regulation. remaining strings operate normally) ovp setpoint too high for the application. startup with one string open; voltage at ledx pin exceeded short-detect threshold (25 v) before ovp could be tripped. ic shuts down. t ovp tripped v ledx v out i led v en c1 c2,c3 c4 t v ledx v out i led v fault c1 c2,c3 c4 led short- detect tripped t v ledx v out i led v en c1 c2,c3 c4 ovp tripped
led backlight driver for lcd monitors and televisions A8512 11 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com overview the A8512 is a multi-output wled/rgb control- ler for backlighting medium-size displays. it has an integrated gate driver for driving an external n-channel boost mosfet. the gate driver voltage is regulated at 7 v, which allows a wide selection of power mosfet (in contrast to being limited to logic-level mosfets when using a 5 v gate driver). the boost controller operates in fixed-frequency current-mode control. the switching frequency can be set in the range from 300 khz to 1 mhz, by an external resistor, r fset , connected between fset and ground. the external mosfet switch is protected by pulse-by-pulse cur- rent limiting. the current limit is independent of duty cycle, and is set using an external sense resistor, r sc . the A8512 has six well-matched current sinks that provide regu- lated current through the leds for uniform display brightness. the boost converter is controlled by monitoring all ledx pins simultaneously and continuously. multiple A8512 can be connected in parallel, for applications that require more than six led strings. one master controller is in charge of the boost converter stage, while other slave control- lers act as led current sinks only. the converter output voltage will be boosted to a level just sufficient for all led currents to be within regulation. up to six A8512s (1 master + 5 slaves) can be connected in parallel, which allows up to 36 led strings to be powered by just one boost converter. the maximum number of leds within each string is limited only by the voltage ratings of the external power components (mosfet, diode, and capacitors). led current setting the maximum led current can be set, at up to 130 ma/channel, through the iset pin. connect a resistor, r iset , between this pin and ground to set the reference current level, i set . the value of i set (ma) is determined by: i set = 1.235 / r iset (k ) . (1) the resulting current is multiplied internally with a gain of 640 and mirrored on all enabled ledx pins: i led = i set 640 . (2) this sets the maximum current through each ledx, referred as the 100% current . the ledx current can be reduced from the 100% current value by applying an external pwm signal on the pwm pin. conversely, we can calculate r iset according to the led current required: r iset = ( 1.235 / i led ) 640 . (3) in steady-state operation, the maximum average led current that can be handled by the ic depends on its thermal budget. that is, maximum power dissipation and acceptable temperature rise. the thermal budget is affected by various parameters, such as pcb size, copper plane around ic, led v f mismatch, selection of power components (mosfet, inductor and diode), maximum board temperature, and so on. boost switching frequency setting connect an external resistor between the fset pin and gnd, to set boost switching frequency, f sw . the value of f sw (mhz) is determined by: f sw = 52 / r fset , (4) where f sw is in mhz and r fset is in k . the typical range of r fset is approximately 51 to 174 k , which corresponds to 1 mhz to 300 khz. enable the ic turns on when a high signal is applied on the en pin, and turns off when this pin is pulled low. the led current sinks are turned on when both the en and the pwm inputs are high. channel selection the A8512 can be used to drive 1 to 6 led channels. during startup, the ic detects led sink pins which are shorted to ground, and disables the corresponding led channel. therefore, any unused led pins must be connected to ground, otherwise the ic will go into overvoltage protection fault during startup. led pins can be paralleled together for higher cur- rent. for example for a 3 parallel string configuration, connect led1-2, led3-4, and led5-6 together to deliver up to twice the current per led. pwm dimming the A8512 has a very wide range for pwm signal input. it can accept a pwm signal from 100 hz to 5 khz. when a pwm high signal is applied, the ledx pins sink functional description t d pwm i led figure 13. propagation delay from the pwm signal rising edge to i ledx reaching the 90% level
led backlight driver for lcd monitors and televisions A8512 12 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com 100% current. when the pwm signal is low, the led sinks turn off. referring to figure 13, there is a ramp-up delay between when the pwm signal is applied and when the current reaches the 90% level. to improve current dimming linearity for pwm pulse widths less than 100 s, increase the applied pwm pulse-width by 3 to 5 s to compensate for this delay. startup sequence when en is pulled high, the ic enters soft start. the ic first tries to determine which ledx pins are being used, by raising the ledx pin voltage with a small current. after a duration of 512 switching cycles, the ledx pin voltage is checked. any ledx channel with a drain voltage smaller then 100 mv is removed from the control loop. this is the reason why unused ledx pins should be connected to gnd, after the first pwm positive trigger, the boost current is limited to 30% of normal value and all active ledx pins sink 1 / 12 of the set current until output voltage reaches sufficient regulation level. when the device comes out of soft start, boost current and the ledx pin currents are set to normal operating level. within a few cycles, the output capacitor charges to the voltage required to supply full ledx current. after output voltage, v out , reaches the required level, ledx current toggles between 0% and 100% with each pwm command signal. in case of a heavy overload on v out at startup, the device will stay in soft start mode indefinitely, as the output voltage cannot rise to the led regulation level. led short detect any ledx pins that have a voltage exceed- ing the short circuit detect voltage, v sc , cause the device to shut down and this condition is latched. this faults occurs when multiple leds short. in case only a few leds short, the ic will continue to work as long as power dissipation in the ic is limited. overvoltage protection the A8512 has an adjustable over- voltage protection feature to protect the power components (external mosfet, output diode and capacitors) against output overvoltage. the overvoltage level can be set, from 19.5 v to a higher voltage, with an external resistor, r ovp . when the current though the ovp pin exceeds 200 a, internal ovp comparator goes high and the device shuts down. the ovp fault disables all ledx strings that are below regulation, thus preventing them from controlling the boost output voltage. calculate the value for r ovp ( ) as follows: r ovp = ( v ovp ? 19.5) / 200 a , (5) where v ovp is the required ovp level in v. for single-ic operation, select r ovp such that its ovp setpoint is approximately 10 v above the led operating voltage at cold. for example, given the pin regulation voltage, v ledx of 1.4 v (typ.), if led v f = 3.4 v (max.) and there are 15 leds in series, then the operating voltage is approximately: v out = 3.4 v 15 + 1.4 v = 52.4 v . in this case, select ovp at about 60 v, which gives r ovp = 200 k . open led protection during normal operation, if any enabled led string opens, voltage on the corresponding ledx pin goes to zero. the boost loop operates in open loop till the ovp level is reached. the A8512 identifies the open led string when over- voltage is detected. open strings are then removed from the regu- lation loop. afterwards, the boost controller operates in normal manner, and the output voltage is regulated to drive the remaining strings. if the open led string is reconnected, it will sink current up to the programmed current level. note: open strings are removed from boost regulation, but not disabled. this keeps the string in operation if leds open for only a short length of time, or reach ovp level on a transient event. the disconnected string can be restored to normal mode by reen- abling the ic. it can also be restored to normal operation if the fault is removed from the corresponding ledx pin, but an ovp event occurs on any other ledx pin. overcurrent protection the ic provides pulse-by-pulse current limiting for the boost mosfet. the current limit level, i sc (a), can be set by selecting the external resistor, r sc ( ): r sc = 0.095 / i sc . (6) if the boost output voltage is unable to reach the regulation target even when the switch is operating at maximum current limit, the boost control loop will force the compensating capacitor, c comp , to rise in voltage until it reaches the overcurrent fault level (3.4 v approximately). the overcurrent fault forces the device into soft start. thermal shutdown (tsd) the ic shuts down when junction temperature exceeds 165c. it will recover automatically when the junction temperature falls below 125c approximately. vin undervoltage lockout (uvlo) the device is shut down when input voltage, v in , falls below v uvlo . any existing latched fault is cleared. v in operating range considerations when v in is above v uvlo and below 10 v, the ic will operate correctly, but its gate driver voltage may not reach the regulation target of 7 v. this may cause excessive switching and conduction loss if the external mosfet is not fully enhanced.
led backlight driver for lcd monitors and televisions A8512 13 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com during normal operation, the ic draws approximately 10 to 15 ma from the vin pin, depending on switching fre- quency and the external mosfet. at v in = 12 v, this translates into 120 to 180 mw of power consumption, most of it dissipated in internal linear regulators. this power increases proportionally with input voltage. therefore it is highly recommended to keep v in between 10 and 24 v during normal operation. if the input battery voltage must be higher than 24 v, a better solution is to power the vin pin separately using a 12 v supply. doing this reduces the heat dissipation of the ic, and improves the overall system efficiency. fault mode in single-controller operation fault state auto- restart description over- voltage protection yes fault occurs when output voltage exceeds the ovp setpoint voltage. used to prevent the output voltage from damaging the power components. pulse- by-pulse current limit yes fault occurs when the current through the external mosfet increases such that the voltage across the sense1 and sense2 pins exceeds 95 mv typical. the mosfet switch is turned off on a cycle-per-cycle basis. overcurrent protection yes multiple pulse-by-pulse current limits will cause the comp pin voltage to rise. after a time period determined by the comp pin current and the comp capacitor, the comp voltage will exceed the overcurrent detect threshold, forcing a fault. system may hiccup if the total current requirement is too high. over- temperature protection yes fault occurs when the die temperature exceeds the over-temperature threshold, 165c typical. led short protection no fault occurs when the led pin voltage exceeds v sc , 25 v typical. vin uvlo no fault occurs when vin drops below v uvlo , 6.5 v typical. this fault resets all latched faults. parallel operation the A8512 is designed to operate with up to six A8512 devices connected in parallel, in order to drive a greater number of led strings. in this case, the A8512 which controls the boost converter is designated the master, while the other devices are slaves which serve as current sinks for their own led strings. slaves communicate with the master through the shared comp signal. pwm dimming and protection mecha- nisms work consistently across all devices. select r ovp1 for the master controller such that its ovp set- point is approximately 10 v above the led operating voltage at cold. select r ovp2 for each slave controller at approximately 15 to 25 k lower than that for the master. this ensures that, in the case in which an open-led fault occurs, the slave controllers will enable ovp before the master does.
led backlight driver for lcd monitors and televisions A8512 14 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com pcb layout guidelines as with any switching power supply, care should be taken in laying out the board. a switching power supply has sources of high dv/dt and high di/dt which can cause malfunction. all general norms should be followed for board layout. refer to figure 14 for a typical application schematic. the A8512 evaluation board provides a useful model for designing application circuit layouts. the following guidelines should be observed: ? place bypass capacitors physically close to their respective pins (vin, vbias, and vreg7v). ? route analog ground, digital signal ground, led ground (lgnd pin), and power ground (pgnd pin) separately. con- nect all these grounds at the common ground plane under the A8512, serving as a star ground. ? place the input capacitors (c1, c2), inductor (l1), boost diode (d1), mosfet (q1), and output capacitors (c3, c4) so that they form the smallest loop practical. avoid long traces for these paths. ? place the resistors r fset and r iset , and the compensation com- ponents (rz and cz) close to the fset, iset, and comp pins, respectively. connect the other ends to the common star ground. ? A8512 has 50 k internal pull-down resistors on the en and pwm pins to keep these pins low while driving through tri-state state (for example, shutdown). add external resistors r2 and r3 between the en and pwm pins and ground, for added noise immunity. connect these resistors close to the pins and return to the common star ground. ? sense voltage across r sc with smaller length traces. place the sense1 and sense2 traces as close to each other as pos- sible to minimize noise pickup. connect the sense2 trace to the negative end of the resistor and do not connect it to power ground plane. ? provide a substantial copper plane near mosfet q1 and the ic, to provide good thermal conduction. when using multi-layer pcb, make sure there are sufficient numbers of thermal vias underneath and around the ic's exposed pads. application information figure 14. typical application circuit with single controller; vin pin tied to v bat . fset driver vbias vreg7v vin pwm en sense1 sense2 led1 led2 led3 led4 led5 led6 v bat 8 to 24 v A8512 comp iset r sc r ovp ovp v out 18 leds per string r3 r2, r3 optional (A8512 has internal pull-down resistors) r2 r fset r iset rz1 cz1 d1 q1 l1 fault p c5 c6 r1 c4 c3 p c2 c1 p agnd agnd lgnd lgnd pgnd p
led backlight driver for lcd monitors and televisions A8512 15 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com f i g ure 15. t y pical hi g h-volta g e application circuit with sin g le controller; vin pin separate f rom v bat . figure 16. typical medium-voltage application circuit driving high-current (up to 160 ma) led strings. fset driver vbias vreg7v vin pwm en sense1 sense2 led1 led2 led3 led4 led5 led6 v bat 24 to 48 v v in 12 v A8512 comp iset r sc r ovp ovp v out 36 leds per string r3 r2, r3 optional (A8512 has internal pull-down resistors) r2 r fset r iset rz1 cz1 d1 q1 l1 fault p c5 c6 r1 c4 c3 p c2 c1 p agnd agnd lgnd lgnd pgnd p fset driver vbias vreg7v vin pwm en sense1 sense2 led1 led2 led3 led4 led5 led6 v bat 12 to 48 v A8512 comp iset r sc r ovp ovp v out 18 leds per string r3 r2, r3 optional (A8512 has internal pull-down resistors) r2 r fset r iset rz1 cz1 d1 q1 l1 fault p c5 c6 r1 c4 c3 p c2 c1 p v in 12 v agnd agnd lgnd lgnd pgnd p
led backlight driver for lcd monitors and televisions A8512 16 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com package et 28-contact qfn 0.25 +0.05 ?0.07 0.50 0.90 0.10 c 0.08 29x seating plane c a terminal #1 mark area b exposed thermal pad (reference only, terminal #1 identifier appearance at supplier discretion) for reference only; not for tooling use (reference jedec mo-220vhhd-1) dimensions in millimeters exact case and lead configuration at supplier discretion within limits shown c reference land pattern layout (reference ipc7351 qfn50p500x500x100-29v1m); all pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and pcb layout tolerances; when mounting on a multilayer pcb, thermal vias at the exposed thermal pad land can improve thermal dissipation (reference eia/jedec standard jesd51-5) 28 2 1 a 28 1 2 pcb layout reference view b 3.15 0.73 max 3.15 3.15 3.15 0.30 1 28 0.50 1.15 4.80 4.80 c 5.00 0.15 5.00 0.15 d d coplanarity includes exposed thermal pad and terminals
led backlight driver for lcd monitors and televisions A8512 17 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com c seating plane gauge plane seating plane a terminal #1 mark area b b pcb layout reference view 2 1 24 c seating plane c 0.10 24x 0.25 bsc 1.40 ref 2.65 max pins 6, 7, 18, and 19 internally fused for enhanced thermal dissipation for reference only; not for tooling use (reference ms-013ad) dimensions in millimeters dimensions exclusive of mold flash, gate burrs, and dambar protrusions exact case and lead configuration at supplier discretion within limits shown 15.40 0.20 7.50 0.10 10.30 0.33 0.30 0.10 0.33 0.20 1.27 0.40 8 0 a 1.27 bsc 0.51 0.31 2 1 24 reference pad layout (reference ipc soic127p1030x265-24m) all pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and pcb layout tolerances 2.20 0.65 9.60 1.27 branded face package lb 24-pin soicw with internally fused pins
led backlight driver for lcd monitors and televisions A8512 18 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com copyright ?2010, allegro microsystems, inc. the products described here are manufactured under one or more u.s. patents or u.s. patents pending. allegro microsystems, inc. reserves the right to make, from time to time, such de par tures from the detail spec i fi ca tions as may be required to per- mit improvements in the per for mance, reliability, or manufacturability of its products. before placing an order, the user is cautioned to verify that the information being relied upon is current. allegro?s products are not to be used in life support devices or systems, if a failure of an allegro product can reasonably be expected to cause the failure of that life support device or system, or to affect the safety or effectiveness of that device or system. the in for ma tion in clud ed herein is believed to be ac cu rate and reliable. how ev er, allegro microsystems, inc. assumes no re spon si bil i ty for its use; nor for any in fringe ment of patents or other rights of third parties which may result from its use. for the latest version of this document, visit our website: www.allegromicro.com package lp 24-pin tssop with exposed thermal pad a 1.20 max 0.15 0.00 0.30 0.19 0.20 0.09 8o 0o 0.60 0.15 1.00 ref c seating plane c 0.10 24x 0.65 bsc 0.25 bsc 2 1 24 7.800.10 4.400.10 6.400.20 gauge plane seating plane a terminal #1 mark area b for reference only; not for tooling use (reference mo-153 adt) dimensions in millimeters dimensions exclusive of mold flash, gate burrs, and dambar protrusions exact case and lead configuration at supplier discretion within limits shown b exposed thermal pad (bottom surface); dimensions may vary with device 4.32 nom 3 nom 0.65 6.10 3.00 4.32 1.65 0.45 reference land pattern layout (reference ipc7351 tsop65p640x120-25m); all pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and pcb layout tolerances; when mounting on a multilayer pcb, thermal vias at the exposed thermal pad land can improve thermal dissipation (reference eia/jedec standard jesd51-5) pcb layout reference view c c

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